AGP介面定義

admin @ 2014-03-19 , reply:0

AGP介面定義
AGP介面引腳定義

 


AGP介面簡介

AGP,全稱為加速圖像處理埠(Accelerated Graphics Port),是電腦主板上的一種高速點對點傳輸通道,供顯卡使用,主要應用在三維電腦圖形的加速上。AGP是在1997年由Intel提出,是從PCI標準上建立起來,是一種顯卡專用介面。



AGP(Accelerate Graphical Port),加速圖形介面。隨著顯示晶元的發展,PCI匯流排日益無法滿足其需求。英特爾於1996年7月正式推出了AGP介面,它是一種顯示卡專用的局部匯流排。嚴格的說,AGP不能稱為匯流排,它與PCI匯流排不同,因為它是點對點連接,即連接控制晶元和AGP顯示卡,但在習慣上我們依然稱其為AGP匯流排。AGP介面是基於PCI 2.1 版規範並進行擴充修改而成,工作頻率為66MHz。




132pin EDGE (AGP bus) 鏈接器外圖


 
AGP cards and slots






































Graphics Card Types Connector Type* Description
AGP 3.3V Card 3.3V slot Supports only 3.3V signaling. Available speeds 1x, 2x.
AGP 1.5V Card 1.5V slot Supports only 1.5V signaling. Available speeds 1x, 2x, 4x.
Universal AGP Card Double slotted Supports 3.3V and 1.5V signaling. Available speeds 1x, 2x at 3.3V and 1x, 2x, 4x at 1.5V.
AGP 3.0 Card 1.5V slot Supports only 0.8V signaling. Available speeds 4x, 8x.
Universal 1.5V AGP 3.0 Card 1.5V slot Supports 1.5V and 0.8V signaling. Available speeds 1x, 2x, 4x at 1.5V and 4x, 8x at 0.8V.
Universal AGP 3.0 Card Double slotted Supports AGP 3.3v, 1.5V, and 0.8V signaling. Available speeds 1x, 2x at 3.3V and 1x, 2x, 4x at 1.5V and 4x, 8x at 0.8V.

*Different slots connectors have different position of key

 


AGP介面引腳定義







































































































































































































































































































































































































































































































































































































































 
3.3 Volt Boards
Universal Boards
1.5 Volt Boards
Pin # Side A Side B Side A Side B Side A Side B
1 +12V OVRCNT# +12V OVRCNT# +12V OVRCNT#
2 TYPEDET# +5.0V TYPEDET# +5.0V TYPEDET# +5.0V
3 Reserved 5.0V Reserved 5.0V Reserved 5.0V
4 USB- USB+ USB- USB+ USB- USB+
5 Ground Ground Ground Ground Ground Ground
6 INTA# INTB# INTA# INTB# INTA# INTB#
7 RST# CLK RST# CLK RST# CLK
8 GNT# REQ# GNT# REQ# GNT# REQ#
9 VCC 3.3 VCC 3.3 VCC 3.3 VCC 3.3 VCC 3.3 VCC 3.3
10 ST1 ST0 ST1 ST0 ST1 ST0
11 Reserved ST2 Reserved ST2 Reserved ST2
12 PIPE# RBF# PIPE# RBF# PIPE# RBF#
13 Ground Ground Ground Ground Ground Ground
14 Reserved Reserved WBF# Reserved WBF# Reserved
15 SBA1 SBA0 SBA1 SBA0 SBA1 SBA0
16 VCC 3.3 VCC 3.3 VCC 3.3 VCC 3.3 VCC 3.3 VCC 3.3
17 SBA3 SBA2 SBA3 SBA2 SBA3 SBA2
18 Reserved SB_STB SB_STB# SB_STB SB_STB# SB_STB
19 Ground Ground Ground Ground Ground Ground
20 SBA5 SBA4 SBA5 SBA4 SBA5 SBA4
21 SBA7 SBA6 SBA7 SBA6 SBA7 SBA6
22 Key Key Reserved Reserved Reserved Reserved
23 Key Key GROUND GROUND GROUND GROUND
24 Key Key Reserved 3.3Vaux Reserved 3.3Vaux
25 Key Key Vcc 3.3 Vcc 3.3 Vcc 3.3 Vcc 3.3
26 AD30 AD31 AD30 AD31 AD30 AD31
27 AD28 AD29 AD28 AD29 AD28 AD29
28 VCC 3.3 VCC 3.3 VCC 3.3 VCC 3.3 VCC 3.3 VCC 3.3
29 AD26 AD27 AD26 AD27 AD26 AD27
30 AD24 AD25 AD24 AD25 AD24 AD25
31 Ground Ground Ground Ground Ground Ground
32 Reserved AD STB1 AD STB1# AD STB1 AD STB1# AD STB1
33 C/BE3# AD23 C/BE3# AD23 C/BE3# AD23
34 Vddq 3.3 Vddq 3.3 Vddq Vddq Vddq 1.5 Vddq 1.5
35 AD22 AD21 AD22 AD21 AD22 AD21
36 AD20 AD19 AD20 AD19 AD20 AD19
37 Ground Ground Ground Ground Ground Ground
38 AD18 AD17 AD18 AD17 AD18 AD17
39 AD16 C/BE2# AD16 C/BE2# AD16 C/BE2#
40 Vddq 3.3 Vddq 3.3 Vddq Vddq Vddq 1.5 Vddq 1.5
41 FRAME# IRDY# FRAME# IRDY# FRAME# IRDY#
42 Reserved 3.3Vaux Reserved 3.3Vaux KEY KEY
43 Ground Ground Ground Ground KEY KEY
44 Reserved Reserved Reserved Reserved KEY KEY
45 VCC 3.3 VCC 3.3 VCC 3.3 VCC 3.3 KEY KEY
46 TRDY# DEVSEL# TRDY# DEVSEL# TRDY# DEVSEL#
47 STOP# Vddq 3.3 STOP# Vddq STOP# Vddq 1.5
48 PME# PERR# PME# PERR# PME# PERR#
49 Ground Ground Ground Ground Ground Ground
50 PAR SERR# PAR SERR# PAR SERR#
51 AD15 C/BE1# AD15 C/BE1# AD15 C/BE1#
52 Vddq 3.3 Vddq 3.3 Vddq Vddq Vddq 1.5 Vddq 1.5
53 AD13 AD14 AD13 AD14 AD13 AD14
54 AD11 AD12 AD11 AD12 AD11 AD12
55 Ground Ground Ground Ground Ground Ground
56 AD9 AD10 AD9 AD10 AD9 AD10
57 C/BE0# AD8 C/BE0# AD8 C/BE0# AD8
58 Vddq 3.3 Vddq 3.3 Vddq Vddq Vddq 1.5 Vddq 1.5
59 Reserved AD STB0 Reserved AD STB0# Reserved AD STB0#
60 AD6 AD7 AD6 AD7 AD6 AD7
61 Ground Ground Ground Ground Ground Ground
A62 AD4 AD5 AD4 AD5 AD4 AD5
63 AD2 AD3 AD2 AD3 AD2 AD3
64 Vddq 3.3 Vddq 3.3 Vddq Vddq Vddq 1.5 Vddq 1.5
65 AD0 AD1 AD0 AD1 AD0 AD1
66 Reserved Reserved Vrefcg Vrefcg Vrefcg Vrefcg





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